The present invention relates to monitoring voltage levels and, more particularly, to a universal power supply monitor circuit for operating in a plurality of modes.
Power supply monitor circuits are well known in the art and typically provide a method to detect when a positive or negative power supply voltage level is above a predetermined level, below a predetermined level, outside a predetermined voltage range (window), or within a predetermined voltage range (window). These detection schemes comprise the various modes that can be utilized by a power supply monitor circuit, such as; a positive over/under voltage (window) detector, a negative over/under voltage (window) detector, a dual positive overvoltage detector, a dual negative overvoltage detector, a dual positive undervoltage detector, a dual negative undervoltage detector, a positive and negative overvoltage detector, and a positive and negative undervoltage detector.
At least one prior art power supply monitor circuit includes a multiple integrated chip configuration whereby several separate integrated circuit chips are cascaded to perform the aforementioned modes. However, multiple chips typically require separate bias supplies because of the large drop out voltage of the integrated circuit and comparators. Furthermore, a multiple chip approach requires considerable more silicon and printed circuit board area accompanied by an increase in power dissipation.
Prior art power supply monitor circuits have utilized a dedicated single chip to operate in only one or two of the many aforementioned modes. This approach, of course, has limited flexibility because only a fraction of the modes can be utilized.
Hence, a need exists for a single integrated circuit chip power supply monitor circuit with exceptional flexibility.